High component density and rapid signal transmission are both desirable in an integrated circuit memory device. As circuit density rises however, the conductive traces used to interconnect components must be made finer and placed closer together. Unfortunately, making traces finer and placing them closer together makes them less amenable to rapid signal transmission.
Reducing the cross-section of a given conductor increases its resistance, and consequently its RC time constant. A higher RC time constant is reflected in lower signal transmission speed. Placing traces closer together increases the probability of crosstalk. This also effectively reduces the capacity of a line to transmit signals rapidly. There is thus a need to provide novel interconnect structures that allow rapid signal transmission across high-density integrated circuits.
Different methods of forming conductors on integrated circuit memory devices are known in the art. In conventional practice, conductors have been implemented as buried polysilicon traces. These are formed by patterned doping of a semiconductor substrate. The resistance and capacitance of such traces are high, as compared with traces formed by other means.
It is also known to form metallic interconnects by depositing a layer of metal over a substrate and selectively etching the layer to form a conductor pattern.
The deposition of metal traces over a substrate assembly may also be accomplished by use of a damascene process. In the damascene process metal lines are deposited in grooves etched into a dielectric layer such as a substrate assembly, or insulating layer. Excess metal is then removed by chemical mechanical planarization (CMP). Once the excess metal has been removed only the metal that was deposited down within the grooves remains. This metal forms the interconnecting traces between devices.
Depending on the configuration of the traces, the resistance and capacitance of buried polysilicon lines, or metal traces formed by various methods, tends to limit signal transmission speed. Signal crosstalk between conductors remains a problem. Accordingly, there is a need for new conductor structures and arrangements that improve signal transmission speed in the face of increasing component density.